http://www.myfpga.org/discuz/index.php Latest 20 threads of all forums Copyright(C) MyFPGA Forum Discuz! Board by Comsenz Inc. Fri, 10 Sep 2010 03:08:33 +0000 60 http://www.myfpga.org/discuz/images/logo.gif http://www.myfpga.org/discuz/ http://www.myfpga.org/discuz/viewthread.php?tid=53538 有没有例程共享下？]]> DE2 withoutwing Thu, 09 Sep 2010 09:19:13 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=53490 注: 运行程序之前,在SD Card的跟目录放一张名字为image.jpg的图片,并建立一个名为image.bmp的文件, 程序运行时,会把bmp图片数据写入image.bmp中 ...]]> 软件/源码分享 yqzhang Thu, 09 Sep 2010 07:39:49 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=52570 Innovate Asia 2010 tuoluofu Tue, 07 Sep 2010 01:12:01 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=52303 Innovate Asia 2010 mangran Mon, 06 Sep 2010 12:23:38 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=52139 HDL 园地 andylei Mon, 06 Sep 2010 02:11:48 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=50990 1。采用NIOS II7.2编译的就出错，不知道什么原因？？？
2。我用NIOS II6.0编译成功，但是运行起来后，LCD上没有显示IP地址，说明程序没有执行，这是为什么呢？ ...]]> DE2 翟晓辉 Thu, 02 Sep 2010 16:12:38 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=50374 NIOS II 嵌入式设计 yuhengzhou Tue, 31 Aug 2010 02:22:20 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=50270
在cpu的设置中，无法设置reset vector和exception vector

手动连上，也不行


ps：用范例用的class.ptf生成的sram是能被识别的。]]> SOPC Builder yuhengzhou Mon, 30 Aug 2010 08:41:56 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=50249 HDL 园地 andylei Mon, 30 Aug 2010 03:35:47 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=50248 DE0 longerlily Mon, 30 Aug 2010 03:16:00 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=49470 #
# This file was automatically generated by the Nios II IDE Flash Programmer.
#
# It will be overwritten when the flash programmer options change.
#

cd E:/SOPC/DE0_TOP/hello_world/Debug
<]]> NIOS II 嵌入式设计 117228111 Sat, 28 Aug 2010 06:07:40 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=49285 DE2 jy19760 Fri, 27 Aug 2010 10:05:39 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=49254 DE2 longerlily Fri, 27 Aug 2010 08:51:34 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=49102
#include "io.h"
#include "system.h"

#include "alt_types.h"
#include "sys/alt_flash.h"
#include "sys/alt_flash_dev.h"
#include "alter]]> NIOS II 嵌入式设计 yqzhang Fri, 27 Aug 2010 05:19:48 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=49101 DE2 kknd2009 Fri, 27 Aug 2010 05:07:26 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=49003 08/26/2010 08:04上午 80,867,539 10.0sp1_dsp_builder_windows.exe
08/26/2010 08:09上午 554,765,585 10.0sp1_modelsim_ae_linux.sh
08/26/2010 08:09上午 567,712,172 10.0sp1_]]> FPGA 设计工具 huguangheng Fri, 27 Aug 2010 02:14:48 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=48945 意见建议 andong1984 Fri, 27 Aug 2010 01:32:52 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=48833
module Reset_Delay(iCLK,iRST,oRST_0,oRST_1,oRST_2);
input iCLK;
input iRST;
output reg oRST_0;
output reg oRST_1;
output reg oRST_2;

reg [21:0]]]> DE2 chindji Thu, 26 Aug 2010 08:20:13 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=48713 DE3 allen_wind Thu, 26 Aug 2010 02:43:51 +0000 http://www.myfpga.org/discuz/viewthread.php?tid=48710 DE2 allen_wind Thu, 26 Aug 2010 02:41:03 +0000