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CMOS_Controller the_CMOS_Controller
(
.avs_s1_address (),
.avs_s1_chipselect (),
.avs_s1_export_capture_read (),
.avs_s1_export_capture_readdata (),
.avs_s1_export_capture_start (),
.avs_s1_export_capture_stop (),
.avs_s1_export_clk (),
.avs_s1_read (),
.avs_s1_readdata (),
.avs_s1_write (),
.avs_s1_writedata (),
.csi_clockreset_clk (),
.csi_clockreset_reset_n ()
); 给系统加入CMOS来协助NIOS读取SDRAM缓存的数据,此段代码是顶层文件调用CMOS_Conreoller,请问括号里面要填入什么?才能完好的读取SDRAM缓存数据?
module CMOS_Controller (
// Avalon clock interface siganals
input csi_clockreset_clk,
input csi_clockreset_reset_n,
// Signals for Avalon-MM slave port
input [1:0] avs_s1_address,
input avs_s1_chipselect,
input avs_s1_read,
output reg [31:0] avs_s1_readdata,
input avs_s1_write,
input [31:0] avs_s1_writedata,
// Signals export to top module
output avs_s1_export_clk,
output reg avs_s1_export_capture_start,
output reg avs_s1_export_capture_stop,
output reg avs_s1_export_capture_read,
input [31:0] avs_s1_export_capture_readdata
);
// Slave address constant
parameter CAPTURE_START = 2'h0;
parameter CAPTURE_STOP = 2'h1;
parameter CAPTURE_DATA = 2'h2;
assign avs_s1_export_clk = ~csi_clockreset_clk;
// write to export
always@(posedge csi_clockreset_clk, negedge csi_clockreset_reset_n) begin
if (!csi_clockreset_reset_n) begin
avs_s1_export_capture_start <= 1'b0;
avs_s1_export_capture_stop <= 1'b0;
end
else begin
if (avs_s1_chipselect && avs_s1_write) begin
case (avs_s1_address)
CAPTURE_START:
avs_s1_export_capture_start <= avs_s1_writedata[0];
CAPTURE_STOP:
avs_s1_export_capture_stop <= avs_s1_writedata[0];
default: begin
avs_s1_export_capture_start <= avs_s1_export_capture_start;
avs_s1_export_capture_stop <= avs_s1_export_capture_stop;
end
endcase
end
end
end
// read from export
always@(posedge csi_clockreset_clk, negedge csi_clockreset_reset_n) begin
if (!csi_clockreset_reset_n) begin
avs_s1_export_capture_read <= 1'b0;
avs_s1_readdata <= 32'hzzzzzzzz;
end
else begin
avs_s1_export_capture_read <= 1'b0;
avs_s1_readdata <= 32'hzzzzzzzz;
if (avs_s1_chipselect && avs_s1_read) begin
case (avs_s1_address)
CAPTURE_DATA: begin
avs_s1_export_capture_read <= 1'b1;
avs_s1_readdata <= avs_s1_export_capture_readdata;
end
default: begin
avs_s1_export_capture_read <= avs_s1_export_capture_read;
avs_s1_readdata <= avs_s1_readdata;
end
endcase
end
end
end
endmodule |
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