//--- pipe delay ---//
always @ (posedge osc_50 or negedge rstn)
if (!rstn)
max_sdat_d <= 1'b1;
else
max_sdat_d <= max_sdat;
//--- config duration ---//
always @ (posedge osc_50 or negedge rstn)
if (!rstn)
conf_duration <= 1'b0;
else if (duration_end)
conf_duration <= 1'b0;
else if (max_sdat_d && !max_sdat)
conf_duration <= 1'b1;
//--- config counter---//
always @ (posedge osc_50 or negedge rstn)
if (!rstn)
conf_counter <= 5'b0;
else if (!conf_duration)
conf_counter <= 5'b0;
else
conf_counter <= conf_counter + 1;
//--- s2p convert ---//
always @ (posedge max_sclk)
if (conf_duration)
begin
if (conf_counter_one)
conf_wr <= max_sdat;
if (conf_wr)
s2p <= {s2p[10:0], max_sdat};
end
//--- programming data latched ---//
always @ (posedge osc_50 or negedge rstn)
if (!rstn)
begin
clk3_set <= 4'h4; //only for test
clk2_set <= 4'ha; //only for test
clk1_set <= 4'hc; //only for test
end
else if (wr_data_ready)
begin
clk3_set <= s2p[11:8];
clk2_set <= s2p[7:4];
clk1_set <= s2p[3:0];
end