always@(posedge iCLK or negedge iRST)
begin
if(!iRST)
begin
Cont <= 0;
oRST_0 <= 0;
oRST_1 <= 0;
oRST_2 <= 0;
end
else
begin
if(Cont!=22'h3FFFFF)
Cont <= Cont+1;
if(Cont>=22'h1FFFFF)
oRST_0 <= 1;
if(Cont>=22'h2FFFFF)
oRST_1 <= 1;
if(Cont>=22'h3FFFFF)
oRST_2 <= 1;
end
end
endmodule
I can't understand this module why do they get these numbers? Pls help me. Thanks作者: wushimin6 时间: 2010-9-17 14:11
我也不理解,高手指点作者: wzh6328 时间: 2010-10-9 10:51
控制不同模块开始工作的先后顺序作者: pplin2002 时间: 2011-1-11 15:15
不同模块的复位(0复位)脉冲宽度不一样,
那些数字就是控制脉冲宽度的,